Forward converter circuits and flyback converter circuits may be used in a number of consumer applications, such as fax machines, telephones, as well as power supplies for computers and other electronic devices. Generally, a forward converter uses a transformer to transfer energy directly between input and output in a single step. FIG. 1 a is a diagram of a forward converter 100. The forward converter 100 includes a transformer 105 that may be used in converting an input alternating current (AC) voltage (Vin) to an isolated output voltage. The forward converter 100 also includes a switch 110. The switch 110 may be controlled by a GATE signal. The switch 110 may be implemented using a transistor. When the switch 110 is in an on state, Vin appears across the primary windings of the transformer 105, which may then generate a voltage Vx that may be expressed as:
      Vx    =                            N          ⁢                                          ⁢          1                          N          ⁢                                          ⁢          2                    ⁢      Vin        ,where N1 and N2 are the number of turns in the primary windings and the secondary windings of the transformer 105, respectively. A first diode 115 on the secondary windings of the transformer 105 may help to ensure that only positive voltages reach the output of the forward converter 100. A second diode 120 may provide a discharge path for an inductor 125 when the transformer 105 has a zero or negative input voltage.
Rather than having an inductor (such as the inductor 125), a flyback converter may store energy in transformer during an on phase and then release the energy during an off phase. The energy storage may occur in a magnetization of the transformer's core. To help increase the stored energy, a gapped core may often be used. FIG. 1b illustrates a flyback converter 150.
FIG. 2a is a diagram illustrating several signals in a forward converter, such as the forward converter 100, wherein the forward converter 100 is configured for PWM operation. A trace 205 illustrates the behavior of a current sense (CS) voltage signal, which may be an indicator of a current being provided by the voltage supply or a current being provided to a load connected to the forward converter 100. The CS voltage signal may also be used to control the state of the switch 110. A signal (referred to herein as a pulse width modulation ramp (PWMRMP) signal and shown in FIG. 2a as a trace 210) may be an amplified version of the CS voltage signal and may also be used to control the state of a signal used to control the state of the switch 110 (the signal used to control the state of the switch 110 may be referred to herein as a GATE signal and shown as trace 215). In addition to being amplified, an offset may also be added to the CS voltage signal to produce the PWMRMP signal.
When the GATE signal becomes high, such as at time event 220, the switch 110 turns on and the input voltage Vin appears across the primary windings of the transformer 105, which in turn, generates a voltage Vx. When the switch 110 is turned on, the voltage Vx is generated and the CS voltage signal begins to ramp up. Similarly, the PWMRMP signal changes from substantially zero to a level 225 referred to as a PWM level or PWM offset voltage (this may correspond to an offset added to the CS voltage signal). The PWM level may be set during the manufacture of the forward converter 100 and generally is not changed during use. The CS voltage signal may begin at substantially zero and may ramp up to a threshold 230. When the CS voltage signal reaches the threshold 230, the GATE signal becomes low and the switch 110 turns off. The switch 110 turning off returns the CS voltage signal back to substantially zero.
Similarly, after starting at the level 225, the PWMRMP signal may increase until it meets or exceeds a threshold 232. The threshold 232 may correspond to a feedback (FB) signal, which may be based on an output provided to a load by the forward converter 100. As the PWMRMP signal exceeds the threshold 232 (the FB signal), such as at time event 235, the GATE signal becomes low and the switch 110 turns off. The switch 110 turning off returns the PWMRMP signal back to substantially zero.
When the forward converter 100 is operating under light load conditions, a feedback (FB) signal may be very low or very close to a built-in PWM level, which may typically be set during manufacture of the forward converter 100 and is generally not changed during use. This may correspond to a very low level for the CS voltage signal. A relationship between the CS voltage signal and a feedback voltage signal (a voltage signal that may be dependent on an output of the forward converter 100) may be governed by an equation expressible as:PWMRMP=PWM Gain*CS+PWM Level,where PWM Gain is an internally fixed gain value, CS is the CS voltage signal, PWM Level is the PWM offset voltage and is an internally fixed offset value, and PWMRMP is the PWM ramp signal. The switch 110 of the forward converter 100 may turn off when the PWMRMP signal reaches the level of the feedback voltage signal. Therefore, if the feedback voltage signal is at 0.856 V, PWM Gain is at 3.2, PWM Offset is at 0.6, then solving for CS, CS would be equal to 80 mV.
The low value of the CS voltage signal (for example, 80 mV) may make the forward converter 100 susceptible to noise. FIGS. 2b and 2c illustrate the effect of a low slew rate on noise susceptibility of the forward converter. FIG. 2b shows a trace 240 illustrating the GATE signal, showing at time event 245, the GATE signal resetting to a low value when a CS voltage signal (shown as trace 250 in FIG. 2c) reaches a threshold 255. However, if there is noise (shown as noise spike 260 at time event 265) present on the CS voltage signal, wherein the noise may be due to switching, the noise on the CS voltage signal may cause a detector (or a comparator) to incorrectly determine that the CS voltage signal has reached the threshold 255. The incorrect determination of the CS voltage signal reaching the threshold 255 may result in the GATE signal resetting to a low value.
As a result of the low slew rate, the GATE signal may jitter from a large duty cycle (shown as interval 270) to a small duty cycle (shown as interval 272) and so forth. The jittering in the GATE signal may produce audible noise. The audible noise may be exacerbated if the change in the duty cycle of the GATE signal changes rapidly from a large duty cycle to a small duty cycle.
FIG. 2d is a diagram illustrating signals in the forward converter 100. Pulse jittering in the GATE signal is shown in a trace 275, wherein the pulse jittering is shown as the dramatic differences in pulse widths in the GATE signal. A trace 280 illustrates the PWMRMP signal, wherein high frequency switching has introduced noise into the PWMRMP signal, such as noise spikes 285, 286, and 287. If a noise spike, such as the noise spike 285, has sufficient magnitude, the noise spike 285 at time event 290 may cause an erroneous detection of the PWMRMP signal meeting or exceeding the threshold 232 (the FB signal), thereby causing the GATE signal to become low and the switch 110 to turn off. Noise spikes may also be seen on the CS voltage signal, shown as trace 295. The noise on the CS voltage signal may also cause an erroneous detection of the CS voltage signal meeting or exceeding the threshold 230, thereby causing the GATE signal to become low and the switch 110 to turn off.
Additionally, a forward converter and/or a flyback converter may operate in several different operating modes, depending on the power requirements of a load attached to the converter. One such operating mode is a burst mode. The burst mode may typically be used during low load or no load conditions. As described previously, the CS voltage signal may be used to reset the state of a transistor, such as the switch 110. For example, when the CS voltage signal exceeds a threshold, the switch 110 may be reset. However, since there may be a delay between the time when it is detected that the CS voltage signal exceeds the threshold and when the switch 110 is actually reset, the CS voltage signal may continue to change (increase). The continued increase in the CS voltage signal may result in the CS voltage signal overshooting to different levels dependent on an input voltage. A higher input voltage may cause a higher overshoot in the CS voltage signal, which in turn may deliver a higher power and vice versa. With a difference in power between a high input voltage and a low input voltage, there may be either an undesired overshoot or a larger than expected undershoot of an output voltage when the load of the converter changes from burst mode back to normal mode.